1. Field of the Invention
The present invention is related to a non-volatile memory cell and a method of operating the same, and more particularly, to a non-volatile memory cell with high program/erase efficiency and a method of programming/erasing the same.
2. Description of the Prior Art
Non-volatile memory (NVM) is a type of memory that retains information it stores even when no power is supplied to memory blocks. Some examples include magnetic devices, optical discs, flash memory, and other semiconductor-based memory topologies. Non-volatile memory can be categorized in electrically addressed systems (i.e., read-only memory) and mechanically addressed systems (i.e., hard disks, optical disc, magnetic tape, holographic memory, and such). Specifically, since non-volatile memory does not require its memory data to be periodically refreshed, it is commonly used for secondary storage or long-term consistent storage.
An NVM device includes a memory array having a plurality of memory cells. Each non-volatile memory cell typically utilizes a floating gate positioned above and insulated from a channel region in a semiconductor substrate. The floating gate is positioned between the source and drain regions. A control gate is then provided over the floating gate. The threshold voltage (Vth) of the transistor thus formed is controlled by the amount of charge that is retained on the floating gate. That is, the minimum amount of voltage that must be applied to the control gate before the transistor is turned on to permit conduction between its source and drain is controlled by the level of charge on the floating gate. Some non-volatile memory cells have a storage element implemented with the floating gate for storing two ranges of charges. That is, a non-volatile memory cell may be programmed or erased between two states: an erased state and a programmed state.
Generally, with advancement of techniques, a high density or high capacity-based non-volatile memory device is required to facilitate big data accessibility. Thus, a voltage circuit with large size for driving the non-volatile memory cells to operate in erased state and programmed state is essential. However, a voltage circuit capable of supplying high voltage for programming/erasing non-volatile memory cells occupies large space and may not be able to be placed at optimal locations on the chip, thereby decreasing cell density and reducing flexibility or performance of design.
Therefore, there is a need for a non-volatile memory cell which can be programmed and erased with high efficiency without reducing cell density.